Alif Semiconductor /AE302F80F55D5AE_CM55_HP_View /SDMMC /SDMMC_ADMA_SA_LOW_R

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Interpret as SDMMC_ADMA_SA_LOW_R

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADMA_SA_LOW

Description

ADMA System Address Register (Low)

Fields

ADMA_SA_LOW

ADMA System Address. These bits indicate the lower 32 bits of the ADMA system address. SDMA: If the SDMMC_HOST_CTRL2_R[HOST_VER4_ENABLE] bit is set to 0x1, this register stores the system address of the data location. ADMA2: This register stores the byte address of the executing command of the descriptor table. ADMA3: This register is set by ADMA3. ADMA2 increments the address of this register that points to the next line, every time a Descriptor line is fetched.

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